1. Field of the Invention
This invention relates to a semiconductor device package.
2. Description of the Prior Art
Technology making free use of the thin film or thick film process, molding in resin for sealing, bonding, etc. is known for the assembly of various semiconductor device packages. Such assembly technology has however many problems as mentioned below that remain to be solved. Problem 1
The hybrid integrated circuit (hereinafter abbreviated "HiC") of prior art primarily relies on the thick film process in that a circuit is formed on a board made of a ceramic or other material, for example, by offset printing and a semiconductor element is packaged thereon as a general package, such as the SOP (small outline package) or FLP (flat package)., or flip chip (C.0.B.), TAB, or the like with R, (resistor) C, (capacitor) and other circuit chip parts packaged on the same board. With the thick film process, it is technically difficult to achieve fine and dense circuit fabrication, however, it has been impossible to integrate the circuit to a high density. Furthermore, depending on circuit type, it is sometimes necessary to treat the whole or part of the circuit board with resin by coating or potting, which causes problems of lower productivity and less reliability. Problem 2
On the other hand, the HiC packaged by the thin film process can achieve a high circuit density though only by applying a packaging technique of high reliability. This means very expensive costs. Problem 3
In case of a HiC of prior art which is transfer molded to have a resin-sealed package, for example, referring to FIG. 1, a printed circuit board 1 is secured on a lead frame 2 and a semiconductor element 3 is mounted thereon, which is then wired with bonding wires 4 to the circuit printed on the board 1. This circuit is further wired with bonding wires 5 for electrical connection to outer leads 6. The whole assembly is then sealed in a resin mold 7. With a large circuit board size of the board 1, however, the standard package design of prior art is subject to cracks securing in the resin and other problems caused by stresses resultant from interactions between the sealing resin 7, lead frame 2, and board 1. Another problem of such a package is deterioration in moistureproof performance due to much more proximity of the inside of the HiC to the outer environment thereof compared to the conventional standard IC. Problem 4
Application oriented semiconductor device packages, for example, HiCs as mentioned in the above Problems 1 and 2, are produced in small lots in many versions, so these devices have a problem that efficient production cannot be accomplished therewith, making it difficult to achieve any essential cost reduction. Problem 5
The resin-sealed package, as shown in FIG. 1, provided by the transfer mold process has a problem of the deformation on molding, for example, of the lead wires. To avoid this, it is necessary to use a lower molding pressure, which has a disadvantage in that the resin cannot pack at high density, resulting in poor sealing and deterioration of the package in moistureproof performance. Problem 6
The so-called "beam lead" bonding method in face-up position, which connects the semiconductor element to beam leads fabricated by etching copper foil stuck to plastic tape, for example, made of polyimide, or a blank copper sheet, results in very expensive costs when used for production of application oriented semiconductor device packages produced in small lots in many versions. Further, the nature of the plastic material of which the tape is made is such that it is difficult to satisfactorily seal the assembled device in resin by the transfer mold process. For high reliability, therefore, the device is sealed in resin otherwise, for example, by screen printing or potting. Furthermore, after packaging onto the board, the outer leads for connection to external terminals, being mechanically weak, require coating, etc. The total packaging cost thus becomes expensive. Problem 7
With know semiconductor device packages that are sealed in resin by the transfer mold process, cracks in the mold resin and/or damages on the semiconductor element are often encountered under stresses produced by interactions between resin, lead frame, semiconductor element, etc. Particularly, this is encountered when copper alloy is used for the material of the lead frame. These stresses also cause a problem in that aluminium leads may be deformed from the semiconductor element. Further, the concentration of stresses along the interface between resin and lead frame results in separation of resin 7 from the lead frame 6. As a result, moisture and halide ions may penetrate through a gap along the interface from the open end thereof causing troubles, for example, the corrosion of aluminium leads from the semiconductor element. Problem 8
The plastic material of prior art used for sealing is expensive since only a single type of resin (with high electrical insulation, high moistureproof performance, high thermal conductivity, low stresses, etc.) is used for sealing a semiconductor device in resin by the transfer mold process to achieve the necessary performances as a hermetic package. Problem 9
With the wire bonding design as shown in FIG. 1, including a case where the semiconductor element is directly connected to the outer leads by wire bonding, it is necessary to secure irreducible minimum areas (primarily those corresponding to bonding pads 8, see FIG. 2) on the semiconductor element around the active element region thereof to bond wires made of Au, Al, Cu or the like thereto. This places restrictions on efforts to achieve a high density of circuit integration. It is noted that FIG. 2 illustrates a smaller number of pads 8 than would be the case in ordinary practice to facilitate an easier understanding of how the bonding pads are disposed on the semiconductor element 3. In addition, the resin-sealed package provided by the transfer mold process is subject to the deformation of the wires by the resin molding, such that a lower molding pressure must be used in such a mold process for avoiding the wire deformation problem. Under a lower molding pressure, however, resin cannot pack at high density for complete sealing. This results in inferior moistureproof performance. The application oriented semiconductor device or the like typically requires a large number of connections, so the wire bonding approach may contribute to inferior productivity. Ordinarily, it takes 0.1 to 0.2 sec to bond a wire to a pad. Accordingly, the bonding time to establish, for example, one hundred connections is 10 to 20 sec. Further, an additional time is needed, for example, for positioning. The semiconductor element, etc. might thus be affected adversely. Problem 10
By the face-down bonding approach, called "flip chip technique", a semiconductor element 10 with bump electrodes 9 is connected to a board 11 as shown in FIGS. 3 and 4. In this case, interactions between the semiconductor element 10 and board 11, for example, due to heating give rise to stresses that concentrate at bumps, sometimes causing troubles, such as a connection failure. Solder (Sn-Pb alloy) is typically used as the material of these bumps 9 since this material not only makes positioning on bonding easier but allows reflow bonding. In FIG. 4, a silicon chip 12 has an aluminium circuit 13 connected to an aluminium lead 14 with a bump formed at one end thereof by laminating a plated chromium layer 15, plated nickel layer 16, plated copper layer, 17 and top, solder or gold layer 18 successively. The silicon chip 12 further has a surface oxide film 19, intermediate insulating layers 20 and 21, and an overcoat layer 22 disposed thereon. To avoid any possible troubles that may result from stresses, a bump configuration as shown in either (A) or (B) of FIG. 5 is used. With such a bump configuration, however, the transfer mold process is not applicable because the molding temperature and other aspects of the transfer mold process adversely affect the integrity of the completed package to a significant degree. A special packaging technique that involves very expensive costs thus becomes necessary. Problem 11
If the package structure as shown.degree. -in FIG. 1 is , adopted for the semiconductor element, the semiconductor device package will be limited to a relatively small number of pins (outer leads). Therefore, in order to have various modifications of the basic functional operations of the semiconductor element, different semiconductor devices may be necessary.
OBJECTS AND SUMMARY OF THE INVENTION
Accordingly, it is an object of this invention to provide a semiconductor device package that substantially avoids any of the major problems as described herein, is reliable and can be fabricated rapidly at low cost.
It is another object for a semiconductor element having a the invention to provide a semiconductor device package of higher degree of circuit integration density.
It is still another object of the invention to provide a semiconductor, device package which has a package structure readily enabling the number of available pins to be increased to adapt the semiconductor device package to various applications.
Namely, the invention is concerned with a semiconductor device package comprising a semiconductor element or elements and an accompanying circuit sealed in resin in which the semiconductor element or elements and the accompanying circuit are coated with a plurality of resin types having different functions in providing the resin-sealed package.
Further, the invention is directed to a semiconductor device package having bonding pads preferably in matrix configuration at least in the active region of the semiconductor element or elements for wireless bonding (particularly as flip chips for face-down bonding).
Still further, the invention concerns a semiconductor device package wherein two or more semiconductor devices are stacked and at least one of such semiconductor devices has longer outer leads than the other semiconductor device or devices in the stack.
According to a preferred embodiment of the invention, a resin-sealed application oriented semiconductor device package is provided which comprises a circuit board and a plurality of miniature semiconductor elements connected to the circuit board in face-down configuration wherein the circuit board made of the same sort of semiconductor material as the miniature semiconductor elements has additional resistors, capacitors, etc. formed by the ordinary process of semiconductor element fabrication, instead of the thick or thin film technology as heretofore applied, with bump electrodes added thereto. This approach enables a higher degree of circuit integration to be achieved and provides a semiconductor device package with improved performance. Since the semiconductor elements are made of a semiconductor material of the same sort as the circuit board, the bump electrodes are subject to less stress and thereby are less affected in an adverse manner.
Further conductive bumps are formed on the conventional lead frame, which allow direct connection from the lead frame to the circuit board without requiring any bonding wire. Further, a package design where the semiconductor device assembled as above-described is coated (for example by potting) with a plurality of different resin types having different functions allows use of an inexpensive resin to be used in the transfer mold process for satisfactory sealing. The package thus fabricated performs as satisfactorily as the ordinary FLP type semiconductor device package or the like.
Other objects, features and advantages of the invention will appear more fully from the following detailed description thereof taken in connection with the accompanying drawings.